A through-silicon via (TSV) is a vertical electrical connection passing completely through a silicon wafer or die. TSV technology is important in creating 3D packages and 3D integrated circuits (IC). It provides interconnection of vertically aligned electronic devices through internal wiring that significantly reduces complexity and overall dimensions of a multi-chip electronic circuit.
A typical TSV process includes formation of TSV holes and deposition of a diffusion barrier layer and a conductive seed layer. A conductive material is then electroplated into TSV holes. Copper is typically used as the conductive material as it supports high current densities experienced at complex integration, such as 3D packages and 3D integrated circuits, and increased device speed. Furthermore, copper has good thermal conductivity and is available in a highly pure state.
TSV holes typically have high aspect ratios and depositing copper into such structures can be challenging. CVD deposition of copper requires complex and expensive precursors, while PVD deposition often results in voids and limited step coverage. Electroplating is a more common method of depositing copper into TSV structures; however, electroplating also presents a set of challenges because of the TSV's large size and high aspect ratio.
Typically, an electroplating solution for TSVs includes copper sulfate as a source of copper ions, sulfuric acid for controlling conductivity, copper chloride for nucleation of suppressor molecules, and several other additives. A standard copper plating bath with at least 10 grams per liter of sulfuric acid and about 40 grams per liter of copper ions are used. High acid content improves solution conductivity helping plated copper uniformly, but hydrogen ions significantly impede mobility of copper ions. Therefore, electroplating TSVs can take a very long time.
Accordingly, improved methods and apparatus to deposit conductive metals in TSV holes having large sizes and high aspect ratios are needed.